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STRUCTURE TYPE PRODUCT SERIES FEATURES
Silicon Monolithic Integrated Circuit Step down DC/DC converter controller for Laptop PC
BD9526AMUV

Built in 2ch H3REG DC/DC converter controller The Light load mode efficiency is improved by SLLM (Simple Light Load Mode) Adjustable Switching Frequency (f=200kHz~500kHz) Built in 3ch Linear Regulator
Symbol VIN1, VIN2, CTL EXTVCC, FB1, FB2, Is+1, Is+2, MCTL FS1, FS2, REF1, REF2, LG1,LG2,TEST1,TEST2 BOOT1, BOOT2 BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2 HG1 HG2 EN1, EN2 DGND, PGND1, PGND2 Pd1 Pd2 Pd3 Pd4 Topr Tstg Tjmax Limits 30 *1*2 7 *1*2 INTVCC+0.3 *1*2 35 *1*2 7 *1*2 BOOT1+0.3 *1*2 BOOT2+0.3 *1*2 6 *1*2 AGND0.3 *1*2 Unit V V V V V V V V V
Absolute Maximum ratings (Ta=25)
Parameter
Terminal voltage
Power dissipation 1 Power dissipation 2 Power dissipation 3 Power dissipation 4 Operating temperature range Storage temperature range Junction Temperature
0.38* 4 0.88 * 5 2.06 * 6 4.56 *
-10+100 -55+150 +150
3
W W W W

*1 Do not however exceed Pd. *2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle. *3 Reduced by 3.0mW for each increase in Ta of 1 over 25 (when don't mounted on a heat radiation board ) *4 Reduced by 7.0mW for increase in Ta of 1 over 25. (when mounted on a board 70.0mmx70mmx1.6mm Glass-epoxy PCB which has 1 layer. (Copper foil area : 0mm2)) *5 Reduced by 16.5mW for increase in Ta of 1 over 25. (when mounted on a board 70.0mmx70mmx1.6mm Glass-epoxy PCB which has 4 layers. (1st and 4th copper foil area : 20.2mm2, 2nd and 3rd copper foil area : 5505mm2)) *6 Reduced by 36.5mW for increase in Ta of 1 over 25. (when mounted on a board 70.0mmx70mmx1.6mm Glass-epoxy PCB which has 4 layers. (All copper foil area : 5505mm2))
Operating supply voltage range (Ta=25)
Parameter Symbol VIN1,VIN2 EXTVCC CTL EN1, EN2 Terminal voltage BOOT1, BOOT2 BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2 REF1, REF2 Is+1, Is+ 2, FB1, FB2 MCTL
MIN. 7 4.5 -0.3 -0.3 4.5 -0.3 1 1.9 -0.3
MAX. 25 5.5 25 5.5 30 5.5 2.75 5.6 INTVCC+0.3
Unit V V V V V V V V V
This product is not designed for protection against radioactive rays. Status of this document The Japanese version of this document is the official specification. This translated version is intended only as a reference, to aid in understanding the official version. If there are any differences between the original and translated versions of this document, the official Japanese language version takes priority.
REV. B
2/4
Electrical characteristics (unless otherwise noted,
Parameter
VIN1 Bias Current VIN2 Bias Current 1 VIN2 Bias Current 2
Ta=25 VIN1=VIN2=12V, CTL=5V, EN1=EN2=5V, REF1=2.5V, REF2=1.65V, RFS1=RFS2=51k)
Symbol
IIN1 IIN2_1 IIN2_2
Min.
-0.3 2.3 -0.3 2.3 4.90 200 3.27 100 3.27 100 4.2 2 4.0 2.45 50 REF1x2 -25m 5 REF2x2 -25m 3 -1 0.860 0.570 3.5 REFx2x0.66 0.5 43 0.5 -0.3 1.5 4.5 1.5
Limit Typ.
130 100 20 0 0 1 1 5.00 3.30 3.30 4.4 4 1.0 4.2 2.65 100 REF1x2 25 1 REF2x2 16 1 0.960 0.670 7 0.2 3.0 2.0 2.0 0.5 REFx2x0.7 1 50 2.5 2.5 1.0 -
Max.
200 150 40 10 10 0.8 25 3 0.8 5.5 3 5.10 180 50 3.33 33 33 3.33 20 30 4.6 8 2.0 4.4 2.85 200 REF1x2 +25m 50 3 REF2x2 +25m 32 3 1 1.060 0.770 14 0.4 6.0 4.0 4.0 1.0 REFx2x0.74 2 57 10 10 2.0 0.3 3.0 INTVCC+0.3 3.0
Unit
A A A A A V V A V V A V mA mV mV V mA mV mV V mA mV mV V ms V V mV V A k V A k A s s s s V ms mV A A ms V V V V
Condition
CTL=5V CTL=5V, EN1=EN2=0V CTL=5V, EN1=EN2=0V,EXTVCC=5V CTL=0V CTL=0V
VIN1 Shutdown Current ISHD1 VIN2 Shutdown Current ISHD2 CTL Low Voltage VCTLL CTL High Voltage VCTLH CTL Bias Current ICTL EN Low Voltage VENL EN High Voltage VENH EN Bias Current IEN [5V Linear Regulator] INTVCC output Voltage VINTVCC INTVCC Maximum Current IINTVCC INTVCC Line regulation Reg.lINT INTVCC Load regulation Reg.LINT [3.3V Linear Regulator] REG1 Output Voltage VREG1 REG1Maximum Current IREG1 REG1Line regulation Reg.l1 REG1Load regulation Reg.L1 REG2 Output Voltage VREG2 REG2Maximum Current IREG2 REG2Line regulation Reg.l2 REG2Load regulation Reg.L2 [5V Switch Block] EXTVCC Input Threshold Voltage Vcc_UVLO EXTVCC Input Delay Time TVcc Switch Resistance RVcc [Under voltage lock out block for DC/DC] INTVCC Threshold Voltage REG1_UVLO REG2 Threshold Voltage REG2_UVLO Hysteresis voltage dV_UVLO [Error amplifier block] Feed back voltage 1 VFB1 FB1 Bias Current IFB1 Output Discharge Resistance 1 RDISOUT1 Feed back voltage 2 VFB2 FB2 Bias Current IFB2 Output Discharge Resistance 2 RDISOUT2 REF1, REF2 Bias Current IREF1, IREF2 [H3REG block] ON Time 1 TON1 ON Time 2 TON2 Maximum On Time TONMAX Minimum Off Time TOFFMIN [FET Driver block] HG higher side ON resistor HGHON HG lower side ON resistor HGLON LG higher side ON resistor LGHON LG lower side ON resistor LGLON [Short circuit protection block] SCP Threshold Voltage VSCP Delay Time TSCP [Current limit protection block] Maximum offset voltage dVSMAX Is+1 bias current IISP1 Is+2 bias current IISP2 [Soft Start block] Soft Start Time TSS [SLLM mode control block] MCTL terminal voltage 1 VCONT MCTL terminal voltage 2 MCTL terminal voltage 3 MCTL float level VQLLM VSLLM VMCTL
VCTL=5V
VEN=3V IINTVCC1=1mA IREG2=0mA VIN=7.5 to 25V IINTVCC=0 to 30mA IREG1=1mA VIN=7.5 to 25V IREG1=0 to 50mA IREG2=1mA VIN=7.5 to 25V IREG2=0 to 100mA EXTVCC: Sweep up
INTVCC: Sweep up REG2: Sweep up INTVCC, REG2: Sweep down
FB1=5V
FB2=3.3V
REF=2.5V REF=1.65V
Is+1=2V Is+2=2V
Continuous mode QL2M mode (Maximum LG off time : 40usec) SL2M mode (Maximum LG off time : )
REV. B
3/4 Physical Dimensions
5.00.1
5.00.1 1.0Max.
D9526A
Lot No.
S
0.08 S
C0.2
1
3.40.1
8
0.40.1
25 24 17
3.40.1
32
9
0.02 +0.03 -0.02 0.22 +0.05 -0.03
16
0.75 0.5
0.25 +0.05 -0.04
VQFN032-V5050 (UNIT : mm)
Block Diagram, Application Circuit
Vo2 Adjustable Vo1 Adjustable
Pin Description
PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PIN Name LG2 PGND2 SW2 HG2 BOOT2 TEST2 DGND REF2 Is+2 FB2 FS2 MCTL AGND FS1 FB1 Is+1 REF1 CTL TEST1 BOOT1 HG1 SW1 PGND1 LG1 VIN1 EN1 REG1 EXTVCC REG2 INTVCC EN2 VIN2 FIN
BOOT2
VIN2
PGND2
BOOT1
VIN2
5
INTVCC
4
3
INT VCC
1
2
INTVCC
20
21
22
INT VCC
24
PGND1 23
SW2
SW1
HG2
LG2
HG1
LG1
AGND Short through Protection Circuit
TM
CL2 SCP2
Short through Protection Circuit
TM
CL1 SCP1
13 DGND
7
FS1
SCP1
FS2
Short Circuit Protect SCP2
11
RFS2
SLLM Block
MCTL2
MCTL1
SLLM Block
14
Short Circuit Protect RFS1
Timer
FS2
FS1
EN2 TEST2 (Vo25%) UVLO
TSD
EN1 TEST1 (Vo15%)
FB2
SS2
Timer
H Reg Controller Block
3
TM
H Reg Controller Block
3
TM
FB1
SS1 Thermal Protection
10 REF2
15 REF1 17
Over Current Protect
8
Over Current Protect CL2 CL1
REG2
REG2
VIN2
5V Reg
3.3V Reg
Is+1
9
INTVCC REG2 MCTL2 MCTL1 FB2 SLLM Mode Control FB1
16
Reference Block
EN1 26
31
VIN1
3.3V Reg
32 TEST2 VIN2
MCTL
VIN1
6
25
18 REG1 CTL
27
12 EXTVCC
28 INTVCC
30 REG2
29 TEST1
3.3V
19
VIN2
725V
REG1
VIN1
725V
3.3V
INTVCC
VCC
5V
Apply the supply voltage EXTVCC pin after INTVCC pin is operated.
REV. B
4/4 Output condition table
Input CTL Low Low Low Low High High High High EN1 Low Low High High Low Low High High EN2 Low High Low High Low High Low High REG1(3.3V) OFF OFF OFF OFF ON ON ON ON REG2(3.3V) OFF OFF OFF OFF ON ON ON ON Output INTVCC OFF OFF OFF OFF ON ON ON ON DC/DC1 OFF OFF OFF OFF OFF OFF ON ON DC/DC2 OFF OFF OFF OFF OFF ON OFF ON
NOTE FOR USE
(1) Absolute maximum rating The device may be destroyed when applied voltage or operating temperature exceeds its absolute maximum rating. Because the source, such as short mode or open mode, cannot be identified if the device is destroyed, it is important to take physical safety measures (such as fusing) if a special mode in excess of absolute rating limits is to be implemented. (2) Supply line In case the motor's reverse electromotive force gives rise to the return of regenerative current, measures should be taken to establish a channel for the current, such as adding a capacitor between the power supply and GND. In determining the approach to take, make sure that no problems will be posed by the various characteristics involved, such as capacitance loss at low temperatures with an electrolytic capacitor. (3) GND potential Make sure the potential for the GND pin is always kept lower than the potentials of all other pins, regardless of the operating mode. (4) Thermal design Be sure to factor in allowable power dissipation (Pd) in actual operation, and to build sufficient margin into the thermal design to accommodate this power loss. (5) (6) (7) Operation in strong magnetic fields Use in strong electromagnetic fields may cause malfunctions. Exercise caution with respect to electromagnetic fields. ASO Set the parameters so that output Tr will not exceed the absolute maximum rating or ASO value when the IC is used. Thermal shutdown circuit This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the chip temperature reaches the threshold value listed below. When TSD is on, the device goes to high impedance mode. Note that the TSD circuit is provided for the exclusive purpose shutting down the IC in the presence of extreme heat, and is not designed to protect the IC per se or guarantee performance when or after extreme heat conditions occur. Therefore, do not operate the IC with the expectation of continued use or subsequent operation once the TSD is activated. TSD ON temperature [] 175 (8) Ground wiring pattern When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change stemming from the wiring resistance and high current does not cause any voltage change in the small-signal GND. In the same way, care must be taken to avoid wiring pattern fluctuations in any connected external component GND. (9) Heat sink (FIN) Since the heat sink (FIN) is connected with the Sub, short it to the GND. (10) For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of wiring. (11) Short-circuits between pins and and mounting errors Do not short-circuit between output pin and supply pin or ground, or between supply pin and ground. Mounting errors, such as incorrect positioning or orientation, may destroy the device. (typ.) Hysteresis temperature [] 15 (typ.)
REV. B
Appendix
Notes
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